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J. Renewable Sustainable Energy 1, 053102 (2009); doi:10.1063/1.3204460 (15 pages)

A novel pulse width modulation for grid-connected multilevel inverter

J. Selvaraj
and N. Rahim

Department of Electrical Engineering, University Malaya, 50603 Kuala Lumpur, Malaysia Map This map

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This paper presents a single-phase five-level grid-connected photovoltaic inverter with a novel dual reference modulation technique. Two reference signals identical to each other with an offset equivalent to the amplitude of the triangular carrier signal were used to generate pulse width modulation (PWM) signals. The inverter consists of a full-bridge inverter and an auxiliary circuit comprising of four diodes and a switch. The inverter produces output voltage in five levels: 0, +1/2Vdc, Vdc, −1/2Vdc, and −Vdc. A digital proportional-integral (PI) current control algorithm is implemented in DSP TMS320F2812 to keep the current injected into the grid sinusoidal and to have high dynamic performance with low total harmonic distortion (THD). The validity of the proposed inverter is verified through simulation and is implemented in a prototype. The experimental results are compared to conventional single-phase three-level grid-connected pulse width modulation (PWM) inverter in terms of THD.

© 2009 American Institute of Physics

Article Outline

  1. INTRODUCTION
  2. FIVE-LEVEL INVERTER TOPOLOGY
  3. PWM MODULATION AND OPERATIONAL PRINCIPLE
  4. CONTROL SYSTEM ALGORITHM AND IMPLEMENTATION
  5. SIMULATION RESULTS
  6. EXPERIMENTAL RESULTS
  7. CONCLUSION

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KEYWORDS and PACS

Keywords

digital control, electric current control, harmonic distortion, photovoltaic power systems, PI control, power conversion harmonics, power grids, PWM invertors

PACS

  • 84.70.+p

    High-current and high-voltage technology: power systems; power transmission lines and cables

  • 84.60.Jt

    Photoelectric conversion

  • 88.40.mp

    Grid-tied solar electric systems

  • 84.30.Jc

    Power electronics; power supply circuits

ARTICLE DATA

History
Received 6 October 2008
Accepted 23 July 2009
Published 18 September 2009
Permalink
http://link.aip.org/link/JRSEBH/v1/i5/p053102/s1

PUBLICATION DATA

ISSN:

19417012 (print)  
19417012 (online)

Publisher:

$abstract.society.value is a Member of CrossRef American Institute of Physics

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Figures (18) Tables (3)

Figures (click on thumbnails to view enlargements)

FIG. 1
Full-bridge inverter configuration together with an auxiliary circuit.
FIG. 1 View Enlargement | Download High Resolution Image (.zip file)
FIG. 2
Carrier and reference signals.
FIG. 2 View Enlargement | Download High Resolution Image (.zip file)
FIG. 3
Single-phase five-level inverter topology.
FIG. 3 View Enlargement | Download High Resolution Image (.zip file)
FIG. 4
Switching pattern for single-phase five-level inverter.
FIG. 4 View Enlargement | Download High Resolution Image (.zip file)
FIG. 5
MPPT flowchart.
FIG. 5 View Enlargement | Download High Resolution Image (.zip file)
FIG. 6
Five-level inverter with control algorithm implemented in DSP TMS320F2812.
FIG. 6 View Enlargement | Download High Resolution Image (.zip file)
FIG. 7
PWM switching strategy.
FIG. 7 View Enlargement | Download High Resolution Image (.zip file)
FIG. 8
PWM signal for S2–S6.
FIG. 8 View Enlargement | Download High Resolution Image (.zip file)
FIG. 9
Inverter output waveform for M>1.0: (a) Vinv and (b) Ig.
FIG. 9 View Enlargement | Download High Resolution Image (.zip file)
FIG. 10
Inverter output waveform for Vinv<Vg/math: (a) Vinv and (b) Ig.
FIG. 10 View Enlargement | Download High Resolution Image (.zip file)
FIG. 11
Inverter output waveform for Vinv<Vg/math and M<1.0: (a) Vinv and (b) Ig.
FIG. 11 View Enlargement | Download High Resolution Image (.zip file)
FIG. 12
Prototype of the five-level inverter with dual reference modulation technique.
FIG. 12 View Enlargement | Download High Resolution Image (.zip file)
FIG. 13
PWM switching signals for S2–S6: (a) S2, (b) S3 and S4, and (c) S5 and S6.
FIG. 13 View Enlargement | Download High Resolution Image (.zip file)
FIG. 14
Experiment results of Vinv and Ig.
FIG. 14 View Enlargement | Download High Resolution Image (.zip file)
FIG. 15
Experiment results of Vinv and Ig for Vinv<Vg/math.
FIG. 15 View Enlargement | Download High Resolution Image (.zip file)
FIG. 16
THD result of five-level PV inverter.
FIG. 16 View Enlargement | Download High Resolution Image (.zip file)
FIG. 17
Grid voltage Vg and grid current Ig at near unity power factor.
FIG. 17 View Enlargement | Download High Resolution Image (.zip file)
FIG. 18
THD result of three-level PV inverter.
FIG. 18 View Enlargement | Download High Resolution Image (.zip file)

Tables

Table I. Inverter output voltage during S2–S6 switch on and off.
Table II. PV module characteristics.
Table III. PV multilevel inverter specifications and controller parameters.

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